AI in FPGA Design Flows - Hype, Help or Transformation?

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TechWorks' FPGA Front Runners network meets at Siemens in Hammersmith to work out where AI is actually helping FPGA design.

The half-day brings FPGA designers, verification engineers, architects and EDA vendors together on AI-assisted engineering, copilots and agentic tools: which parts of the FPGA lifecycle gain most, whether productivity gains are measurable and repeatable, how trust and verification hold up, and whether RTL stays the dominant abstraction. Siemens opens at 10:30, with morning and afternoon speaker sessions either side of a networking lunch. Speakers aren't named on the page yet. 10:00 to 14:45.

Free to register.