Senior/Principal DFT Engineer
Fractile · Bristol and London
Fractile designs chips and systems to run frontier AI models at thousands of tokens per second. This senior or principal engineer owns design-for-test for its large AI accelerator SoC, from scan and memory test strategy through to production test and yield.
Apply on Fractile- Company
- Fractile
- Where
- Bristol and London
- Function
- Engineering
- Posted
- 1 week ago
- Seniority
- Senior
- Work mode
- On-site
The role
What you’ll do
- Define the DFT architecture, including scan, compression, MBIST, LBIST and boundary scan
- Set DFT methodology, tool flows and signoff criteria
- Work with RTL and physical design on clean integration and timing closure
- Bring up and debug ATPG patterns on ATE, and mentor DFT engineers
What you’ll need
- Typically 8+ years of DFT on complex ASIC or SoC designs
- Ownership of DFT architecture on at least one large tapeout
- Deep expertise in scan, compression, ATPG and MBIST with Synopsys or Tessent tools
- Silicon bring-up, debug and yield ramp experience
Good to know: Based in London or Bristol. Equity, private medical, dental and vision cover, pension and 25 days' holiday plus bank holidays. Some roles need export-control eligibility checks.
Events for people in this role
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About Fractile
DeepTech, AI & ML and SaaS. Backed by Accel (London), Kindred Capital and Oxford Science Enterprises. Stage: series_unknown.
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