DesignOn-siteMid

Silicon Physical Design Engineer — Multiple Levels

Graphcore, part of SoftBank Group, builds AI compute from silicon up to datacentre scale. This physical design engineer turns chip designs into sign-off-quality layouts for foundries such as TSMC on advanced nodes, working with RTL, verification, DFT and packaging teams.

Apply on Graphcore

Company: Graphcore
Where: Bristol
Function: Design
Posted: 42 weeks ago
Team: Physical Design
Seniority: Mid
Work mode: On-site
Categories: Design AI & ML DeepTech SaaS

The role

What you’ll do

Deliver sign-off-quality layouts for next-generation AI chips on advanced process nodes
Use industry EDA tools and Graphcore's in-house flows, and improve those flows and APIs
Debug complex physical design problems and find workable fixes
Work with internal teams and third-party engineers and contractors

What you’ll need

A degree in electronic or electrical engineering, computer science or similar
Experience on 7nm or smaller technologies
Broad physical design experience: floorplanning, place and route, CTS, timing, DRC/LVS
Scripting in Tcl and Python

Good to know: Bristol or Cambridge, multiple levels. Flexible working, private medical and dental, pension matched up to 5%, generous parental leave. The application asks about UK right to work.