AI for Chip Design — NeurIPS 2026 Paris Workshop

A full-day workshop on machine learning applied to chip design, accepted onto the Paris venue of NeurIPS 2026 and running out of Room 109 on Sorbonne Université's Jussieu campus. Morning session 08:30 to 12:15, lunch, then the afternoon session from 13:15 to 18:15. It was initiated by the Barcelona Supercomputing Center, an ELLIOT partner, and the organising committee spans BSC, ETH Zürich and Università di Bologna (Luca Benini), the Silicon Integration Initiative, HKUST and Georgia Tech. The call for papers closed on 30 August, so the programme is drawn from accepted work rather than invited talks. No separate ticket page is published — the workshop site carries the programme and the organisers' contact. Why go: EDA and machine learning rarely share a room, and this is the day in Paris where silicon people and ML researchers are in the same one. For hardware engineers, EDA researchers and anyone working on accelerators.